ANL-CEEESA/RELOG
1
0
Fork 0
mirror of https://github.com/ANL-CEEESA/RELOG.git synced 2025-12-06 07:48:50 -06:00
Code Issues Packages Projects Releases Wiki Activity

Fix tests

Browse Source
This commit is contained in:
Alinson S. Xavier
2020-05-22 08:58:42 -05:00
parent bb88e6e2e1
commit 56898882eb
3 changed files with 10 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/RELOG.jl
View File

@@ -1,7 +1,7 @@
# Copyright (C) 2020 Argonne National Laboratory
# Written by Alinson Santos Xavier <axavier@anl.gov>
module ReverseManufacturing
module RELOG
include("dotdict.jl")
include("instance.jl")
include("graph.jl")

6
src/model.jl
View File

@@ -155,13 +155,13 @@ end
function solve(filename::String; optimizer=Cbc.Optimizer)
println("Reading $filename...")
instance = ReverseManufacturing.load(filename)
instance = RELOG.load(filename)
println("Building graph...")
graph = ReverseManufacturing.build_graph(instance)
graph = RELOG.build_graph(instance)
println("Building optimization model...")
model = ReverseManufacturing.build_model(instance, graph, optimizer)
model = RELOG.build_model(instance, graph, optimizer)
println("Optimizing...")
JuMP.optimize!(model.mip)